Publications
Detailed Information
Reversible energy recovery logic circuit without non-adiabatic energy loss
Cited 26 time in
Web of Science
Cited 28 time in Scopus
- Authors
- Issue Date
- 1998
- Citation
- Electronics Letters- IEE, 1998, vol. 34, pp.344-346.
- Abstract
- The authors propose a reversible energy recovery logic (RERL)
circuit for ultra-low-energy consumption, whch consumes only
adiabatic energy loss and leakage current loss by completely
eliminating non-adiabatic energy loss. It is a dual-rail adiabatic
circuit using the concept of reversible logic with a new eight-phase
clocking scheme. Simulation results show that at low-speed
operation, the RERL consumes much less energy than the
complementary static CMOS circuit and other adiabatic logic
circuits.
- ISSN
- 0013-5194
- Language
- English
- Files in This Item:
- There are no files associated with this item.
Item View & Download Count
Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.