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A 2 GHz CMOS Double Conversion Downconverter with Robust Image Rejection Performance against the Process and Temperature Variations
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Song, Eun-Seok | - |
| dc.contributor.author | Chae, Soo-Ik | - |
| dc.contributor.author | Kim, Wonchan | - |
| dc.date.accessioned | 2009-12-18T05:36:37Z | - |
| dc.date.available | 2009-12-18T05:36:37Z | - |
| dc.date.issued | 2000 | - |
| dc.identifier.citation | VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on , vol., no., pp.38-41 | en |
| dc.identifier.issn | 0374-4884 | - |
| dc.identifier.uri | https://hdl.handle.net/10371/21367 | - |
| dc.description.abstract | This paper presents a 2 GHz image rejection (IR) downconverter
implemented in a 0.65 pm CMOS technology. It maintains high IR ratio against the process and temperature variations if the on-chip passive RC components are relatively matched. The experimental circuit provides an IR ratio of 40.8 dB without any off-chip filtering or tuning, and dissipates 91 mW at 3.3 V. | en |
| dc.language.iso | en | - |
| dc.title | A 2 GHz CMOS Double Conversion Downconverter with Robust Image Rejection Performance against the Process and Temperature Variations | en |
| dc.type | Article | en |
| dc.contributor.AlternativeAuthor | 송은석 | - |
| dc.contributor.AlternativeAuthor | 채수익 | - |
| dc.contributor.AlternativeAuthor | 김원찬 | - |
| dc.identifier.doi | 10.1109/VLSIC.2000.852845 | - |
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