S-Space

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Showing results 1 to 3 of 3

Issue Date	Title / Author(s) / Citation	File
2022-02	A Wide-Lock-In-Range and Low-Jitter 12-14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.57 No.2, pp.480-491	DOI
2022-09	A Low-Jitter and Low-Fractional-Spur Ring-DCO-Based Fractional-N Digital PLL Using a DTC's Second-/Third-Order Nonlinearity Cancellation and a Probability-Density-Shaping Δ σ M Hwang, Chanwoong; Park, Hangi; Lee, Yongsun; Seong, Taeho; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.57 No.9, pp.2841-2855	DOI
2022-12	A Low-Jitter Ring-DCO-Based Fractional-<i>N</i> Digital PLL With a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector Park, Hangi; Hwang, Chanwoong; Seong, Taeho; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.57 No.12, pp.3527-3537	DOI