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Showing results 1 to 5 of 5

Issue Date	Title / Author(s) / Citation	File
2022-02	A Wide-Lock-In-Range and Low-Jitter 12-14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.57 No.2, pp.480-491	DOI
2022-04	A Patient-Specific Closed-Loop Epilepsy Management SoC With One-Shot Learning and Online Tuning Zhang, Miaolin; Zhang, Lian; Tsai, Chne-Wuen; Yoo, Jerald IEEE Journal of Solid-State Circuits, Vol.57 No.4, pp.1049-1060	DOI
2022-06	A Low-Jitter 8-GHz RO-Based ADPLL With PVT-Robust Replica-Based Analog Closed Loop for Supply Noise Compensation Kim, Hyojun; Jung, Woosong; Kim, Kwandong; Kim, Sungwoo; Choi, Woo-Seok; Jeong, Deog-Kyoon IEEE Journal of Solid-State Circuits, Vol.57 No.6, pp.1712-1722	DOI
2023-03	Bus Impedance Matrix Estimation Using Non-PMU Measurements Chang, Jae Won; Lee, Gyu Sub; Oh, Seaseung IEEE Transactions on Power Systems, Vol.38 No.2, pp.1743-1746	DOI
2023-10	A Charge Recycling Logic Data Links for Single-and Multiple-Channel I/Os Wu, Han; Park, Jeong Hoan; Jiang, Rucheng; Choi, Jung-Hwan; Yoo, Jerald IEEE Journal of Solid-State Circuits, Vol.58 No.10, pp.2790-2800	DOI