Noise Performance Design of CMOS Preamplifier for the Active Semiconductor Neural Probe

Abstract

A systematic design guideline is presented for the noise performance of preamplifier for semiconductor neural probe which contains on-chip electronic circuitry. The overall signal-to-noise ratio (SNR) is calculated considering the spectral characteristics of the measured extracellular action potential and the low-frequency noise spectrum of the CMOS device from typical fabrication processes. An analytical expression of the output noise power is derived, and utilized to tailor the frequency response and device parameters which are controllable by the circuit designer. An analysis of the output SNR of a two-stage CMOS differential amplifier is given and the major factors which have significant effects on the SNR are determined. We showed that a little deviation of the input device sizes and transconductance ratio from the optimal values can significantly deteriorate the SNR. Quantitative information of the preamplifier circuit parameters for satisfactory noise performance is provided.