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Showing results 1 to 16 of 16

Issue Date	Title / Author(s) / Citation	File	Altmetrics
2017	An External-Capacitor-less Low-Dropout Regulator with Less than-36dB PSRR at All Frequencies from 10kHz to 1GHz Using an Adaptive Supply-Ripple Cancellation Technique to the Body-Gate Lim, Younghyun; Lee, Jeonghyun; Park, Suneui; Choi, Jaehyouk 2017 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC)
2017-11	An External Capacitor-Less Ultralow-Dropout Regulator Using a Loop-Gain Stabilizing Technique for High Power-Supply Rejection Over a Wide Range of Load Current Lim, Younghyun; Lee, Jeonghyun; Lee, Yongsun; Song, Seong-Sik; Kim, Hong-Teuk; Lee, Ockgoo; Choi, Jaehyouk IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, Vol.25 No.11, pp.3006-3018	DOI
2018	A 320μV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector Lim, Younghyun; Lee, Jeonghyun; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk ESSCIRC 2018 - IEEE 44TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC), pp.210-213
2018	An External-Capacitor-Less High-PSR Low-Dropout Regulator Using an Adaptive Supply-Ripple Cancellation Technique to the Body-Gate Lim, Younghyun; Lee, Jeonghyun; Park, Suneui; Choi, Jaehyouk 2018 23RD ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), pp.299-300
2018	153 fS<sub>RMS</sub>-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-<i>LC</i>-Hybrid Injection-Locked Clock Multiplier Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk 2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, pp.185-186
2018-09	An External Capacitorless Low-Dropout Regulator With High PSR at All Frequencies From 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique Lim, Younghyun; Lee, Jeonghyun; Park, Suneui; Jo, Yongwoo; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.53 No.9, pp.2675-2685	DOI
2019	A 0.5V-V<sub>IN</sub>, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer Lee, Jeonghyun; Bang, Jooeun; Lim, Younghyun; Choi, Jaehyouk 2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C130-C131
2019-04	An Ultra-Low-Jitter 22.8-GHz Ring-<i>LC</i>-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114 Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.54 No.4, pp.927-936	DOI
2019-12	A Fast-Transient and High-Accuracy, Adaptive-Sampling Digital LDO Using a Single-VCO-Based Edge-Racing Time Quantizer Lee, Jeonghyun; Bang, Jooeun; Lim, Younghyun; Yoo, Seyeon; Lee, Yongsun; Seong, Taeho; Choi, Jaehyouk IEEE SOLID-STATE CIRCUITS LETTERS, Vol.2 No.12, pp.305-308	DOI
2020	A-240dB-FoMjitter and-115dBc/Hz PN @ 100kHz, 7.7GHz Ring-DCO-Based Digital PLL Using P/I-Gain Co-Optimization and Sequence-Rearranged Optimally Spaced TDC for Flicker-Noise Reduction Lee, Yongsun; Seong, Taeho; Lee, Jeonghyun; Hwang, Chanwoong; Park, Hangi; Choi, Jaehyouk 2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC), pp.266-+
2020	A-58dBc-Worst-Fractional-Spur and-234dB-FoM<sub>jitter</sub>, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word Seong, Taeho; Lee, Yongsun; Hwang, Chanwoong; Lee, Jeonghyun; Park, Hangi; Lee, Kyuho Jason; Choi, Jaehyouk 2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC), pp.270-+
2021	A 0.0084-mV-FOM, Fast-Transient and Low-Power External-Clock-Less Digital LDO Using a Gear-Shifting Comparator for the Wide-Range Adaptive Sampling Frequency Bang, Jooeun; Choi, Seojin; Yoo, Seyeon; Lee, Jeonghyun; Kim, Juyeop; Choi, Jaehyouk ESSCIRC 2021 - IEEE 47TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC), pp.351-354	DOI
2022	A 97fsrms-Jitter and 68-Multiplication Factor, 8.16GHz Ring-Oscillator Injection-Locked Clock Multiplier with Power-Gating Injection-Locking and Background Multi-Functional Digital Calibrator Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2022-February, pp.212-214	DOI
2022-10	A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68 Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS	DOI
2023	A 122fsrms-Jitter and -60dBc-Reference-Spur 12.24GHz MDLL with a 102 - Multiplication Factor Using a Power-Gating Technique Cho, Yoonseo; Lee, Jeonghyun; Park, Suneui; Yoo, Seyeon; Choi, Jaehyouk Digest of Technical Papers - Symposium on VLSI Technology, Vol.2023-June	DOI
2023	A 0.009mm2, 6.5mW, 6.2b-ENOB 2.5GS/s Flash-and-VCO-Based Subranging ADC Using a Resistor-Ladder-Based Residue Shifter Lee, Jeonghyun; Cho, Yoonseo; Kim, Jintae; Choi, Jaehyouk Proceedings of the Custom Integrated Circuits Conference, Vol.2023-April	DOI

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