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Showing results 1 to 17 of 17

Issue Date	Title / Author(s) / Citation	File	Altmetrics
2000	An auto-ranging clock recovery circuit for multi-rate systems 박준배	link
2004	GSMGPRS용 4개 대역 (85090018001900MHz) CMOS RF 송수신기 송은석	link
2005	INS 정보를 이용하는 GPS의 성능 분석 가상현	link
2007	(A)Clock-edge modulated serial link technique for mobile displays 최원준	link
2010	Synthesis of dexamethasone conjugated deoxycholic acid-poly(L-Lysine) for a non-viral gene delivery carrier 최병호	link
2011-08	(A) study on two-point phase modulation technique and its applications to RF transmitters 이성호	link
2013-02	Constant Relative Gain DCO를 이용한 Adaptive Bandwidth PLL의 설계 최윤주	view file
2014-02	Synthesis of Low Noise All Digital PLL 김우석	view file
2014-02	Design of Digital PLL/CDR with Advanced Digital Controller 류시강	view file
2016-02	A Low-Jitter and Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Real-Time PVT Calibrator With Replica-Delay Cells Kim, Mina; Choi, Seojin; Seong, Taeho; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.51 No.2, pp.401-411	DOI
2016-08	A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier With a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector Choi, Seojin; Yoo, Seyeon; Lim, Younghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.51 No.8, pp.1878-1889	DOI
2017-02	A STUDY ON LOW-PHASE-NOISE 77-GHZ CMOS TRANSMITTER FOR FMCW RADAR 송재훈	view file
2018-02	A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers Yoo, Seyeon; Choi, Seojin; Kim, Juyeop; Yoon, Heein; Lee, Yongsun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.53 No.2, pp.375-388	DOI
2019-04	An Ultra-Low-Jitter 22.8-GHz Ring-<i>LC</i>-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114 Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.54 No.4, pp.927-936	DOI
2019-06	A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration Yoon, Heein; Park, Suneui; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.54 No.6, pp.1564-1574	DOI
2022	Design of LC PLL for DDR5 Clock Buffer Application 이성준	view file link
2022-10	A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68 Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS	DOI

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