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Issue Date	Title / Author(s) / Citation	File	Altmetrics
2008-05	Strength-Reduced Parallel Chien Search Architecture for Strong BCH Codes Cho, Junho; Sung, Wonyong IEEE Trans. Circuits and Systems.II: Express Briefs, vol. 55, no. 5, pp. 427-431, May. 2008	DOI
2009	VLSI Implementation of a Soft Bit-Flipping Decoder for PG-LDPC Codes 김종홍; 조준호; 성원용 제16회 한국반도체학술대회	view file link
2009-05	높은 무게 LDPC 부호의 저복잡도 고성능 복호 알고리즘 Cho, Junho; Sung, Wonyong 한국통신학회논문지, 제34권 5호 pp.498~504	view file
2009-05	VLSI implementation of a soft bit-flipping decoder for PG-LDPC codes Cho, Junho; Kim, Jonghong; Ji, Hyunwoo; Sung, Wonyong IEEE International Symposium on Circuits and Systems (ISCAS), pp. 908-911, May 2009	link
2009-05	높은 무게 LDPC 부호의 저복잡도 고성능 복호 알고리즘 조준호; 성원용 한국통신학회논문지, 34(5), pp. 498-504, 2009	view file
2009-06	Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit Chang, Hoseok; Cho, Junho; Sung, Wonyong J Sign Process Syst, 56(2-3), 249-260, Sep.	DOI
2009-07	PG-LDPC 부호를 위한 Soft Bit-Flipping 복호기의 파이프라인 구현 김종홍; 조준호; 지현우; 성원용 2009 대한전자공학회 하계종합학술대회	view file link
2009-07	Efficient software-based encoding and decoding of BCH codes Cho, Junho; Sung, Wonyong IEEE Trans. Computer, vol. 58, no. 7, pp. 878-889, Jul. 2009	DOI
2009-10	Low-Power Implementation of a High-Throughput LDPC Decoder for IEEE 802.11n Standard Cho, Junho; Shanbhag, Naresh R.; Sung, Wonyong IEEE Workshop on Signal Processing Systems, 7-9 Oct. 2009, Tampere, Finland, pp. 40-45	view file DOI
2009-10	Massively parallel implementation of cyclic LDPC codes on a general purpose graphic processing unit Ji, Hyunwoo; Cho, Junho; Sung, Wonyong IEEE Workshop on Signal Processing Systems, 7-9 Oct. 2009, Tampere, Finland	view file link
2009-10	SIMD processor based implementation of recursive filtering equations Ahn, Jaewoo; Chang, Hoseok; Cho, Junho; Sung, Wonyong IEEE Workshop on Signal Processing Systems, Oct 7-9, 2009, Tampere, Finland	view file link
2020	Study on Decay Characteristics of Vertical Four-Vortex Systems 조준호	view file link

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