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전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

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Issue Date	Title / Author(s) / Citation	File
2023	Design of distributed algorithms via discrete-time blended dynamics theorem 김정우	view file link
2003	Design of efficient arithmetic algorithms for performance improvements of cryptographic protocols 이문규	link
2019-02	Design of Energy Efficient Neural Networks 김재현	view file
2023-10	Design of Energy-Efficient Cryptographically Secure Pseudo-Random Number Generators Using High-Level Synthesis Roh, Hyeri; Choi, Woo Seok 2023 20th International SoC Design Conference, ISOCC, pp.351-352	DOI
2016	Design of Energy-Efficient On-Chip EEG Classification and Recording Processors for Wearable Environments Bin Altaf, Muhammad Awais; Zhang, Chen; Radakovic, Ljubomir; Yoo, Jerald IEEE International Symposium on Circuits and Systems proceedings, pp.1126-1129
2008	Design of ethernet switch architecture for bandwidth provision of broadband access networks 이종훈	link
2023	Design of Fast Transient Response Digital Low-Dropout Regulator for Advanced Memory Application 송윤호	view file link
2017-08	Design of Field-Programmable Mixed-Signal IC with Time-Domain Configurable Analog Block 최윤주	view file
2003	A design of full-CMOS 2-GHz WCDMA transmitter and receiver 이강윤	link
2009	Design of fully integrated CMOS 40-Gbs serial link transceiver 김정겸	link
2008	Design of generic variable length codec Arava, V.K. Prasad	link
2020	Design of High Performance Computing Units for On-device Neural Network Accelerators 강종성	view file link
2008	Design of high rate BCH-LDPC concatenated codes with low error floor 윤석일	link
2023	Design of High Speed PAM-4 Transmitter with Level Mismatch Adjustment for Next-generation Memory Testing Minsu Park	view file link
2022-09	Design of High Step-Down Ratio Isolated Three-Level Half-Bridge DC-DC Converter With Balanced Voltage on Flying Capacitor Choi, Minho; Jeong, Deog-Kyoon IEEE Transactions on Power Electronics, Vol.37 No.9, pp.10213-10225	DOI
2020	Design of High-Density Power-Efficient Transceiver for Next-Generation HBM 고한곤	view file link
2012-02	Design of High-Performance and Low-Power Memory Systems for Multi-Threaded Architectures 최효진	link
2023	Design of High-Speed and Low-Power Internal Display Interface 이광훈	view file link
2017-08	Design of High-Speed CMOS Interface Circuits for Optical Communications 정규섭	view file
2023	Design of High-Speed Multi-Level Transmitter with Tomlinson-Harashima Precoding 강병준	view file link

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