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Issue Date	Title / Author(s) / Citation	File
2016-02	A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition Shu, Guanghua; Choi, Woo Seok; Saxena, Saurabh; Talegaonkar, Mrunmay; Anand, Tejasvi; Elkholy, Ahmed; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.51 No.2, pp.428-439	DOI
2019-06	A 4-to-20Gb/s 1.87pJ/b Referenceless Digital CDR With Unlimited Frequency Detection Capability in 65nm CMOS Park, Kwanseo; Lee, Kwangho; Cho, Sung-Yong; Lee, Jinhyung; Hwang, Jeongho; Choo, Min-Seong; Jeong, Deog-Kyoon 2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C194-C195	DOI
2014-06	A 4.25GHz-4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement Nandwana, Romesh Kumar; Anand, Tejasvi; Saxena, Saurabh; Kim, Seong-Joong; Talegaonkar, Mrunmay; Elkholy, Ahmed; Choi, Woo-Seok; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6858446	DOI
2014-06	A 4.4-5.4GHz digital fractional-N PLL using ΔΣ frequency-to-digital converter Talegaonkar, M.; Anand, T.; Elkholy, A.; Elshazly, A.; Nandwana, R.K.; Saxena, S.; Young, B.; Choi, Woo Seok; Hanumolu, P.K. IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6858392	DOI
2010-11	A 4.78 μs Dynamic Compensated Inductive Coupling Transceiver for Ubiquitous and Wearable Body Sensor Network Lee, Seulki; Yoo, Jerald; Yoo, Hoi-Jun IEICE Transactions on Communications, Vol.E93B No.11, pp.2892-2900	DOI
2011-03	A 40fJ/c-s 1 V 10 bit SARADC with Dual Sampling Capacitive DAC Topology Kim, Binhee; Yan, Long; Yoo, Jerald; Yoo, Hoi-Jun JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, Vol.11 No.1, pp.23-32	DOI
2022	A 410-GHz Detector using AC-coupled Substrate-Integrated Waveguide Slot Antenna in CMOS Anas, Md Toaha; Azmeen-ur-Rahman, Saad; Choi, Wooyeol PROCEEDINGS OF THE 2022 IEEE TEXAS SYMPOSIUM ON WIRELESS AND MICROWAVE CIRCUITS AND SYSTEMS (WMCS)	DOI
2022	A 430GHz CMOS Concurrent Transceiver Pixel Array for High Angular Resolution Reflection-Mode Active Imaging Zhu, Y.; Byreddy, P.R.; Dong, S.; Kenneth, K.O.; Choi, W. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2022-February, pp.86-88	DOI
2017-05	A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS Zhu, Junheng; Mahalley, Makrand; Shu, Guanghua; Choi, Woo Seok; Nandwana, Romesh Kumar; Elkholy, Ahmed; Sahoo, Bibhudatta; Hanumolu, Pavan Kumar Proceedings of the Custom Integrated Circuits Conference, Vol.2017-April, p. 7993679	DOI
2015	A 450-fs Jitter PVT-Robust Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Calibrator with Replica-Delay-Cells Kim, Mina; Choi, Seojin; Choi, Jaehyouk 2015 SYMPOSIUM ON VLSI CIRCUITS (VLSI CIRCUITS)
2011	A 45nm SOI-CMOS PLL with a Wideband LC-VCO Lee, Kun-Seok; Beck, Sungho; Jeon, Hamhee; Yoon, Youngchang; Choi, Jaehyouk; Lee, Chang-Ho; Kenney, J. Stevenson 2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS)
2021-11	A 48 Gb/s PAM4 receiver with Baud-rate phase-detector for multi-level signal modulation in 40 nm CMOS Lee, Kwangho; Jung, Woosong; Ju, Haram; Lee, Jinhyung; Jeong, Deog-Kyoon IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC 2021)	DOI
2023-05	A 48-Gb/s Single-Ended PAM-4 Receiver with Adaptive Nonlinearity Compensation Kim, Kahyun; Yun, Daeho; Baek, Kyungmin; Choi, Woo-Seok; Jeong, Deog-Kyoon IEEE International Symposium on Circuits and Systems proceedings, Vol.2023-May, p. 190917	DOI
2017-02	A 4×32-channel neural recording system for deep brain stimulation systems Kim, Susie; Na, Seung-In; Yang, Youngtae; Kim, Hyunjong; Kim, Taehoon; Cho, Jun Soo; Kim, Jinhyung; Chang, Jin Woo; Kim, Suhwan Journal of Semiconductor Technology and Science, Vol.17 No.1, pp.129-140	view file DOI
2010-11	A 5-Gb/s digitally controlled 3-tap DFE receiver for serial communications Han, Jae Duk; Shin, Woo Yeol; Choi, Woo Seok; Chun, Jung Hoon; Kim, Su Hwan; Jeong, Deog Kyoon 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010, pp.85-88	DOI
2010-01	A 5.2 mW Self-Configured Wearable Body Sensor Network Controller and a 12 μW Wirelessly Powered Sensor for a Continuous Health Monitoring System Yoo, Jerald; Yan, Long; Lee, Seulki; Kim, Yongsang; Yoo, Hoi-Jun IEEE Journal of Solid-State Circuits, Vol.45 No.1, pp.178-188	DOI
2009	A 5.2mW self-configured wearable body sensor network controller and a 12μW 54.9% efficiency wirelessly powered sensor for continuous health monitoring system Yoo, Jerald; Yan, Long; Lee, Seulki; Kim, Yongsang; Kim, Hyejung; Kim, Binhee; Yoo, Hoi-Jun Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp.289-291	DOI
2013-06	A 5Gb/s 2.6mW/Gb/s reference-less half-rate PRPLL-based digital CDR Shu, Guanghua; Saxena, Saurabh; Choi, Woo-Seok; Talegaonkar, Mrumnay; Inti, Rajesh; Elshazly, Amr; Young, Brian; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6578694
2017-09	A 5GHz Digital Fractional-N PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS Talegaonkar, Mrunmay; Anand, Tejasvi; Elkholy, Ahmed; Elshazly, Amr; Nandwana, Romesh Kumar; Saxena, Saurabh; Young, Brian; Choi, Woo Seok; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.52 No.9, pp.2306-2320	DOI
2018-06	A 64 Gb/s 1.5 pJ/bit PAM-4 Transmitter with 3-Tap FFE and G(m)-Regulated Active-Feedback Driver in 28 nm CMOS Ju, Haram; Choi, Moon-Chul; Jeong, Gyu-Seob; Jeong, Deog-Kyoon 2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, pp.51-52	DOI

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