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Showing results 21 to 40 of 449

Issue Date	Title / Author(s) / Citation	File
2002-03	An Efficient Implementation of the BSP Programming Library for Via Kee, Yangsuk; Ha, Soonhoi Parallel Processing Letters 12(1) (2002), 65-77	DOI
2002-03	Extended Synchronous Dataflow for Efficient DSP System Prototyping Park, Chanik; Chung, Jaewoong; Ha, Soonhoi Design Automation for Embedded Systems, vol. 6, no. 3, pp. 295-322, Mar. 2002	DOI
2002-07	Fractional rate dataflow model and efficient code synthesis for multimedia applications Oh, Hyunok; Ha, Soonhoi ACM SIGPLAN Notices, Vol. 37, No. 7, pp 12-17	DOI
2002-08	Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design Jung, Hyunuk; Lee, Kangnyoung; Ha, Soonhoi IEEE Transactions on Very Large Scale Integration(VLSI) Systems, Vol. 10, No. 4, pp. 423-428, 2002	view file DOI
2002-10	Combined Data-driven and Event-driven Scheduling Technique for Fast Distributed Cosimulation Kim, Dohyung; Rhee, Chan-Eun; Ha, Soonhoi IEEE Transactions on Very large Scale Integration(VLSI) Systems, Vol. 10, No. 5, pp. 672-679, 2002	DOI
2003-04	Design and Implementation of a User-level Sockets Layer over Virtual Interface Architecture Kim, Jin-Soo; Kim, Kangho; Jung, Sung-In; Ha, Soonhoi Concurrency and Computation: Practice and Experience Vol. 15, No. 7-8, pp. 727-749, 2003	DOI
2003-05	Memory-optimized Software Synthesis from Dataflow Program Graphs with Large Size Data Samples Oh, Hyunok; Ha, Soonhoi EURASIP Journal on Applied Signal Processing, Vol. 2003:6, pp. 514-529, 2003	view file DOI
2003-09	Fast and Time-Accurate Cosimulation with OS Scheduler Modeling Yi, Youngmin; Kim, Dohyung; Ha, Soonhoi Design Automation for Embedded Systems, Vol. 8, No. 2-3, pp. 211-228, 2003	DOI
2004-01	Memory Management for Multi-Threaded Software DSM Systems Kee, Yang-Suk; Kim, Jin-Soo; Ha, Soonhoi Parallel Computing, Vol. 30, No. 1, pp. 121-138, 2004	DOI
2004-05	Fractional rate dataflow model for efficient code synthesis Oh, Hyunok; Ha, Soonhoi Journal of VLSI Signal Processing, 2004, vol. 37, no. 1, pp. 41-51	DOI
2004-07	Dynamic Voltage Scaling for Real-Time Multi-task Scheduling Using Buffers Im, Chaeseok; Ha, Soonhoi ACM SIGPLAN Notices, Vol. 39, No. 7, pp. 88-94, 2004	DOI
2004-09	Energy Optimization for Latency- and Qaulity-Constrained Video Applications Im, Chaeseok; Ha, Soonhoi IEEE Design & Test of Computers, vol. 21, no. 5, pp. 358-366, 2004	view file DOI
2004-10	지연 시간 및 화질 제약이 있는 비디오 응용을 위한 에너지 최적화 기법 임채석; 하순회 정보과학회논문지: 시스템 및 이론, 제31권 제9.10호, pp. 543-552, 2004	view file
2004-11	Dynamic Voltage Scheduling with Buffers in Low-Power Multimedia Applications Im, Chaeseok; Kim, Huiseok; Ha, Soonhoi ACM Transactions on Embedded Computing Systems (TECS) Vol. 3, No. 4, pp 686-705, 2004	DOI
2004-12	Exploring On-Chip Bus Architectures for Multitask Applications Kim, Sungchan; Ha, Soonhoi Journal of Semiconductor Technology and Science (JSTS), Vol. 4 No.4, pp. 286-292, 2004	view file
2005	System Level Specification and Software Synthesis of Multimedia Embedded Systems: PeaCE Approach Ha, Soonhoi; Kim, Dohyung Telecommunications review, Vol. 15, No. 4, pp. 585-601, 2005	view file
2005-02	온 칩 버스 구조와 메모리 할당에 대한 효율적인 설계 공간 탐색 김성찬; 임채석; 하순회 정보과학회논문지 : 시스템 및 이론, 제32권 제1.2호, pp. 55-67, 2005	view file link
2005-05	Schedule-Aware Performance Estimation of Communication Architecture for Efficient Design Space Exploration Kim, Sungchan; Im, Chaeseok; Ha, Soonhoi IEEE Trans.Very Large Scale Integration systems, vol. 13, pp. 539-552, May. 2005	view file DOI
2005-06	빠른 하드웨어/소프트웨어 통합합성을 위한 데이타플로우 명세로부터의 하드웨어 합성 정현욱; 하순회 정보과학회논문지 : 시스템 및 이론, 제32권 제5.6호, pp. 232-242, 2005	view file link
2005-06	Human microRNA prediction through a probabilistic co-learning model of sequence and structure Nam, Jin-Wu; Shin, Ki-Roo; Han, Jinju; Lee, Yoontae; Kim, V. Narry; Zhang, Byoung Tak Nucleic Acids Research, Vol.33 No.11, pp.3570-3581	DOI

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