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Issue Date	Title / Author(s) / Citation	File
2006	A 24.2-μW dual-mode human body communication controller for body sensor network Choi, Sungdae; Song, Seong-Jun; Sohn, Kyomin; Kim, Hyejung; Kim, Jooyoung; Cho, Namjun; Woo, Jeong-Ho; Yoo, Jerald; Yoo, Hoi-Jun European Solid-State Circuits Conference, p. 227	DOI
2020-06	A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and Impedance-Matched Driver and 3-Point ZQ calibration for Memory Interfaces Jeong, Yong-Un; Park, Hyunkyu; Hyun, Changho; Kim, Suhwan 2020 IEEE SYMPOSIUM ON VLSI CIRCUITS, p. 9162864	DOI
2020-06	A 2D Titanium Carbide MXene Flexible Electrode for High-Efficiency Light-Emitting Diodes Ahn, Soyeong; Han, Tae-Hee; Maleski, Kathleen; Song, Jinouk; Kim, Young-Hoon; Park, Min-Ho; Zhou, Huanyu; Yoo, Seunghyup; Gogotsi, Yury; Lee, Tae-Woo Advanced Materials, Vol.32 No.23, p. 2000919	view file DOI
2006	A 2Mb/s wideband pulse transceiver with direct-coupled interface for human body communications Song, Seong-Jun; Cho, Namjun; Kim, Sunyoung; Yoo, Jerald; Yoo, Hoi-Jun Digest of Technical Papers - IEEE International Solid-State Circuits Conference
2020-08	A 3-Mbps, 802.11g-Based EMG Recording System With Fully Implantable 5-Electrode EMGxbrk Acquisition Device Ng, Kian Ann; Rusly, Astrid; Gammad, Gil Gerald Lasam; Le, Nguyen; Liu, Shih-Chiang; Leong, Khay-Wai; Zhang, Miaolin; Ho, John S.; Yoo, Jerald; Yen, Shih-Cheng IEEE Transactions on Biomedical Circuits and Systems, Vol.14 No.4, pp.889-902	DOI
2017-02	A 3-to-10Gb/s 5.75pJ/b Transceiver with Flexible Clocking in 65nm CMOS Nandwana, Romesh Kumar; Saxena, Saurabh; Elkholy, Ahmed; Talegaonkar, Mrunmay; Zhu, Junheng; Choi, Woo Seok; Elmallah, Ahmed; Hanumolu, Pavan Kumar Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.60, pp.492-493	DOI
2015-04	A 3.7 mW Low-Noise Wide-Bandwidth 4.5 GHz Digital Fractional-N PLL Using Time Amplifier-Based TDC Elkholy, Ahmed; Anand, Tejasvi; Choi, Woo Seok; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.50 No.4, pp.867-881	DOI
2014-06	A 3.7mW 3MHz bandwidth 4.5GHz digital fractional-N PLL with-106dBc/Hz In-band noise using time amplifier based TDC Elkholy, Ahmed; Anand, Tejasvi; Choi, Woo Seok; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6858391	DOI
2022-09	A 32-Gb/s PAM4-Binary Bridge With Sampler Offset Cancellation for Memory Testing Yun, Daeho; Lee, Eonhui; Jung, Woosong; Kim, Kahyun; Beak, Kyung-Min; Kim, Jihee; Lee, Hyun-Bae; Ko, Byeongseon; Choi, Woo-Seok; Jeong, Deog-Kyoon IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.69 No.9, pp.3749-3753	DOI
2019-09	A 320-fs RMS Jitter and-75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.54 No.9, pp.2501-2512	DOI
2018	A 320μV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector Lim, Younghyun; Lee, Jeonghyun; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk ESSCIRC 2018 - IEEE 44TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC), pp.210-213
2021-06	A 36-Channel Auto-Calibrated Front-End ASIC for a pMUT-Based Miniaturized 3-D Ultrasound System Lee, Jihee; Lee, Kyoung-Rog; Eovino, Benjamin E.; Park, Jeong Hoan; Liang, Luna Yue; Lin, Liwei; Yoo, Hoi-Jun; Yoo, Jerald IEEE Journal of Solid-State Circuits, Vol.56 No.6, pp.1910-1923	DOI
2021	A 365fs<sub>rms</sub>-Jitter and-63dBc-Fractional Spur 5.3GHz-Ring-DCO-Based Fractional-N DPLL Using a DTC Second/Third-Order Nonlinearity Cancelation and a Probability-Density-Shaping ΔΣM Park, Hangi; Hwang, Chanwoong; Seong, Taeho; Lee, Yongsun; Choi, Jaehyouk 2021 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), Vol.64, pp.442-+	DOI
2019-06	A 370-fJ/b, 0.0056 mm(2)/DQ, 4.8-Gb/s DQ Receiver for HBM3 with a Baud-Rate Self-Tracking Loop Ko, Han-Gon; Shin, Soyeong; Kye, Chan-Ho; Lee, Sang-Yoon; Yun, Jaekwang; Jung, Hae-Kang; Lee, Duobock; Kim, Suhwan; Jeong, Deog-Kyoon 2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C94-C95	DOI
2021-04	A 3D MODEL-BASED APPROACH FOR FITTING MASKS TO FACES IN THE WILD Hong, Je Hyeong; Kim, Hanjo; Kim, Minsoo; Nam, Gi Pyo; Cho, Junghyun; Ko, Hyeong-Seok; Kim, Ig-Jae Proceedings - International Conference on Image Processing, ICIP, pp.235-239	DOI
2021-10	A 3D printing route to fabrication of ZrCuSi alloy target for ZrCuSiN nanocomposite thin films Byun, Myunghwan; Kim, Chung-Soo; Kim, Dong-Hyun; Hwang, Jong-Uk; Lee, Ju-Ho; Park, Eun Soo Applied Surface Science, Vol.562, p. 150136	DOI
2016-02	A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition Shu, Guanghua; Choi, Woo Seok; Saxena, Saurabh; Talegaonkar, Mrunmay; Anand, Tejasvi; Elkholy, Ahmed; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.51 No.2, pp.428-439	DOI
2019-06	A 4-to-20Gb/s 1.87pJ/b Referenceless Digital CDR With Unlimited Frequency Detection Capability in 65nm CMOS Park, Kwanseo; Lee, Kwangho; Cho, Sung-Yong; Lee, Jinhyung; Hwang, Jeongho; Choo, Min-Seong; Jeong, Deog-Kyoon 2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C194-C195	DOI
2014-06	A 4.25GHz-4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement Nandwana, Romesh Kumar; Anand, Tejasvi; Saxena, Saurabh; Kim, Seong-Joong; Talegaonkar, Mrunmay; Elkholy, Ahmed; Choi, Woo-Seok; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6858446	DOI
2014-06	A 4.4-5.4GHz digital fractional-N PLL using ΔΣ frequency-to-digital converter Talegaonkar, M.; Anand, T.; Elkholy, A.; Elshazly, A.; Nandwana, R.K.; Saxena, S.; Young, B.; Choi, Woo Seok; Hanumolu, P.K. IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6858392	DOI

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