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Issue Date	Title / Author(s) / Citation	File
1998	Partial bus-invert coding for power optimization of system-level bus Shin, Youngsoo; Chae, Soo-Ik; Choi, Kiyoung International Symposium on Low Power Electronics and Design 1998, August 10-12, pp.127-132
1998-05	Analysis of the non-uniform samplings in sigma-delta modul ated signals Lee, Eelwan; Chae, Soo-Ik ISCAS '97	view file
1998-05	An HMM-MLP hybrid approach for improving discrimination in speech recognition Na, Kyungmin; Chae, Soo-Ik Proceedings of the International Joint Conference on Neural Networks, pp.156-159	view file
1998-08	New Motion Estimation Algorithm and Its Block-Matching Criteria Using Low-Resolution Quantization Lee, Seongsoo; Chae, Soo-Ik International Technical Conference on Circuits/Systems, Computers and Communications, pp.175-182	view file
1999-10	Frequency-domain implementation of block adaptive filters for ICA-based multichannel blind deconvolution+I3055 Na, Kyungmin; Kang, Sangcheol; Lee, Kyungjin; Chae, Soo-Ik International Conference on Speech Processing, pp.455-460	view file
2000-01	An 8 x 8 nRERL serial multiplier for ultra-low-power applications Lim, Joonho; Kim, Donggyu; Kang, Sangcheol; Chae, Soo-Ik Proc. of ASP-DAC'98, pp.35-36	view file
2000-06	Emulator environment based on an FPGA prototyping board Oh, Kyeongsu; Yoon, Sangyong; Chae, Soo-Ik IEEE International Workshop on Rapid System Prototyping, pp.72-77	view file
2000-07	A three-port nRERL register file for ultra-low-energy application Kwon, Junho; Lim, Joonho; Chae, Soo-Ik International Symposium on Low Power Electronics and Design, pp.155-160	view file
2001-06	A single-chip 2.4GHz direct-conversion CMOS transceiver with GFSK modem for bluetooth application Song, Eun-Seok; Kim, Jung-Min; Lim, Hyeong-Jun; Lee, Kyeongho; Chae, Soo-Ik; Jeong, Deog-Kyoon; Kim, Wonchan IEEE Symposium on VLSI Circuits, pp.245-246	view file
2001-12	An 8-b nRERL Microprocessor for Ultra-Low-Energy Applications Kim, Seokkee; Chae, Soo-Ik; Kwon, Jun-Ho Asia and South Pacific Design Automation Conference, pp.27-28	view file
2002-03	An efficient simulation environment for the design of networked Bluetooth devices Ahn, Yongjin; Kim, Dae Hong; Lee, Sunghyun; Park, Sanggyu; Yoo, Sung Joo; Choi, Kiyoung; Chae, Soo-Ik Design Automation for Embedded Systems, v.8, no. 2-3, pp. 119-138	DOI
2003-09	A cycle-accurate joulemeter for CMOS VLSI circuits Song, Eun-Seok; Choi, Inchan; Park, Younggil; Chae, Soo-Ik European Solid-State Circuits Conference, pp.619-622	view file
2004-06	An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory Han, Sang-Il; Baghdadi, Amer; Bonaciu, Marius Petru; Chae, Soo-Ik; Jerraya, Ahmed Amine Design Automation Conference, pp.250-255	view file
2005-01	A fast VLSI architecture for full-search variable block size motion estimation in MPEG--4 AVC/H.264 Kim, Minho; Hwang, Ingu; Chae, Soo-Ik Asia and South Pacific Design Automation Conference, pp.613-615	view file
2005-05	Implementation of a simple 8-bit microprocessor with reversible energy recovery logic Kim, Seokkee; Chae, Soo-Ik Conference On Computing Frontiers, pp.421-426
2005-06	A C/C++-based functional verification framework using the SystemC verification library_ Park, Sanggyu; Chae, Soo-Ik 16th IEEE International Workshop on Rapid System Prototyping (RSP '05), pp.237-239	view file
2005-06	A two-week program for platform-based SoC design Park, Sanggyu; Chae, Soo-Ik International Conference on Microelectronic Systems Education, pp.43-44	view file
2005-08	Complexity reduction in an nRERL microprocessor Kim, Seokkee; Chae, Soo-Ik International Symposium on Low Power Electronics and Design, pp.180-185
2006-01	Reusable Component IP Design using Refinement-based Design Environment Park, Sanggyu; Yoon, SangYong; Chae, Soo-Ik Asia and South Pacific Design Automation Conference, pp.588-593	view file
2006-01	Functional modeling techniques for efficient SW code generation of video codec applications Han, SangIl; Chae, Soo-Ik; Jerraya, Ahmed. A. Asia and South Pacific Design Automation Conference, pp.74-85
2006-06	A mixed-level virtual prototyping environment for refinement-based design environment Park, Sanggyu; Yoon, SangYong; Chae, Soo-Ik IEEE International Workshop on Rapid System Prototyping (RSP '06), pp.63-68	view file
2006-07	Buffer memory optimization for video codec application modeled in simulink Han, SangIl; Guerin, Xavier; Chae, Soo-Ik; Jerraya, Ahmed. A Design Automation Conference 2006, pp.689-694
2006-09	Implementation of an OpenVG Rasterizer with Configurable Anti-aliasing and Multi-window Scissoring Huang, Ren; Chae, Soo-Ik IEEE International Conference on Computer and Information Technology, pages 179-184	view file
2006-12	Implementation of a H.264 decoder with Template-based Communication Refinement Yoon, SangYong; Park, Sanggyu; Chae, Soo-Ik IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2006), pp.571-574	view file
2007-04	Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC Brisolara, Lisane; Han, SangIl; Guerin, Xavier; Carro, Luigi; Reis, Ricardo; Chae, Soo-Ik; Jerraya, Ahmed 10th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2007), pp.81-89	view file
2007-06	Simulink-Based MPSoC design flow: case study of motion-JPEG and h.264 Huang, Kai; Han, SangIl; Popovici, Katalin; Brisolara, Lisane; Guerin, Xavier; Li, Lei; Yan, Xiaolang; Chae, Soo-Ik; Carro, Luigi; Jerraya, Ahmed Amine Design Automation Conference 2007, pp.39-42
2007-07	Hardware implementation of inter-processor communication in MPSoCs for multimedia applications Koo, Moonmo; Chae, Soo-Ik International Technical Conference on Circuits/Systems, Computers and Communications	view file
2008-09	RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow Cho, Jinhyun; Choi, Soonwoo; Chae, Soo-Ik Forum on specification and Design Languages 2008, pp.251-252	view file
2008-11	High performance IPC hardware accelerator and communication network for MPSoCs Koo, Moonmo; Chae, Soo-Ik International SoC Design Conference, Vol.3 CDC Session pp.21-22	view file
2008-11	An Optimized Rendering Algorithm for Hardware Implementation of OpenVG 2D Vector Graphics Cha, Kilhyung; Kim, Daewoong; Chae, Soo-Ik International SoC Design Conference, Vol.1 ORAL Session pp.338-341	view file