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전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

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Issue Date	Title / Author(s) / Citation	File
2017-02	A 4×32-channel neural recording system for deep brain stimulation systems Kim, Susie; Na, Seung-In; Yang, Youngtae; Kim, Hyunjong; Kim, Taehoon; Cho, Jun Soo; Kim, Jinhyung; Chang, Jin Woo; Kim, Suhwan Journal of Semiconductor Technology and Science, Vol.17 No.1, pp.129-140	view file DOI
2010-11	A 5-Gb/s digitally controlled 3-tap DFE receiver for serial communications Han, Jae Duk; Shin, Woo Yeol; Choi, Woo Seok; Chun, Jung Hoon; Kim, Su Hwan; Jeong, Deog Kyoon 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010, pp.85-88	DOI
2010-01	A 5.2 mW Self-Configured Wearable Body Sensor Network Controller and a 12 μW Wirelessly Powered Sensor for a Continuous Health Monitoring System Yoo, Jerald; Yan, Long; Lee, Seulki; Kim, Yongsang; Yoo, Hoi-Jun IEEE Journal of Solid-State Circuits, Vol.45 No.1, pp.178-188	DOI
2009	A 5.2mW self-configured wearable body sensor network controller and a 12μW 54.9% efficiency wirelessly powered sensor for continuous health monitoring system Yoo, Jerald; Yan, Long; Lee, Seulki; Kim, Yongsang; Kim, Hyejung; Kim, Binhee; Yoo, Hoi-Jun Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp.289-291	DOI
2013-06	A 5Gb/s 2.6mW/Gb/s reference-less half-rate PRPLL-based digital CDR Shu, Guanghua; Saxena, Saurabh; Choi, Woo-Seok; Talegaonkar, Mrumnay; Inti, Rajesh; Elshazly, Amr; Young, Brian; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6578694
2017-09	A 5GHz Digital Fractional-N PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS Talegaonkar, Mrunmay; Anand, Tejasvi; Elkholy, Ahmed; Elshazly, Amr; Nandwana, Romesh Kumar; Saxena, Saurabh; Young, Brian; Choi, Woo Seok; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.52 No.9, pp.2306-2320	DOI
2018-06	A 64 Gb/s 1.5 pJ/bit PAM-4 Transmitter with 3-Tap FFE and G(m)-Regulated Active-Feedback Driver in 28 nm CMOS Ju, Haram; Choi, Moon-Chul; Jeong, Gyu-Seob; Jeong, Deog-Kyoon 2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, pp.51-52	DOI
2021-11	A 64 Gb/s 2.09 pJ/b PAM-4 VCSEL Transmitter with Bandwidth Extension Techniques in 40 nm CMOS Do, Hyungrok; Sull, Jung-Woo; Lee, Seunghyun; Lee, Kwangho; Jeong, Deog-Kyoon IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC 2021)	DOI
2022-09	A 64-Gb/s PAM-4 Receiver With Transition-Weighted Phase Detector Roh, Seungha; Lee, Kwangho; Shim, Minkyo; Choi, Moon-Chul; Jeong, Deog-Kyoon IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.69 No.9, pp.3704-3708	DOI
2019-06	A 64Gb/s 2.29pJ/b PAM-4 VCSEL Transmitter With 3-Tap Asymmetric FFE in 65nm CMOS Hwang, Jeongho; Choi, Hong-Seok; Do, Hyungrok; Jeong, Gyu-Seob; Koh, Daehyun; Park, Kwanseo; Kim, Sungwoo; Jeong, Deog-Kyoon 2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C268-C269	DOI
2018-07	A 65-nm CMOS 2 x 2 MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations Lim, Kyoohyun; Lee, Sanghoon; Lee, Yongha; Moon, Byeongmoo; Shin, Hwahyeong; Kang, Kisub; Kim, Seungbeom; Lee, Jinhyeok; Lee, Hyungsuk; Shim, Hyunchul; Sung, Chulhoon; Park, Kumyoung; Lee, Garam; Kim, Minjung; Park, Seokyeong; Jung, Hyosun; Lim, Younghyun; Song, Changhun; Seong, Jaehyeon; Cho, Heechang; Choi, Jaehyouk; Lee, Jongryul; Han, Sangwoo IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.53 No.7, pp.1960-1976	DOI
2012	A 65nm CMOS Current Controlled Oscilllator with High Tuning Linearity for Wideband Polar Modulation Tang, Yiwu; Hu, Jianyun; Park, Jongmin; Choi, Jaehyouk; Leung, Lincoln; Narathong, Chiewcharn; Sahota, Kamal 2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC)
2019	A 76fs<sub>rms</sub> Jitter and-40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization Kim, Juyeop; Yoon, Heein; Lim, Younghyun; Lee, Yongsun; Cho, Yoonseo; Seong, Taeho; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.62, pp.258-+
2006	A 77 GHz transceiver for automotive radar system using a 120nm in 0.4AlAs/In0.35GaAs metamorphic HEMTs Kim, Kyoungwoon; Choi, Wooyeol; Kim, Sungwon; Seol, Gyungseon; Seo, Kwangseok; Kwon, Youngwoo IEEE COMPOUND SEMICONDUCTOR INTEGRATED CIRCUIT SYMPOSIUM - 2006 IEEE CSIC SYMPOSIUM, TECHNICAL DIGEST 2006, pp.201-204	DOI
2021	A 7m-range, 4.3mW/Ch. Ultrasound ASIC with Universal Energy Recycling TX for All-Weather Metamorphic Robotic 3D Vision System Wu, Han; Zhang, Miaolin; Guo, Jiaqi; Shao, Zhichun; Ng, Kian Ann; Li, Jiamin; Zhang, Lian; Dong, Yilong; Wu, Liuhao; Tsai, Chne-Wuen; Lee, Benjamin Ho Yin; Lin, Liwei; Yoo, Jerald IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC 2021)	DOI
2022	A 97fsrms-Jitter and 68-Multiplication Factor, 8.16GHz Ring-Oscillator Injection-Locked Clock Multiplier with Power-Gating Injection-Locking and Background Multi-Functional Digital Calibrator Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2022-February, pp.212-214	DOI
2023-10	A Baud-Rate Clock and Data Recovery With Collaborative Maximum-Eye Tracking Method Kim, Jihee; Choi, Woo Seok 2023 20th International SoC Design Conference, ISOCC, pp.113-114	DOI
2018-02	A Biosensor platform based on the Carbon Nanotube Network for detecting antibody antigen reaction 임재흥	view file
2012-02	A BJT based 1T-DRAM cell having SiGe heterostructure 심경석	link
2018-08	A Broadband High-Power Amplifier Design for Remote-Controlled IED Jammer Applications 정준호	view file

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