S-Space

Browse

Author

Jump to a point in the index

Or type in a year

Sort by
In order
Results/Page
Authors/record

Showing results 1 to 32 of 32

Issue Date	Title / Author(s) / Citation	File
1998	Reversible energy recovery logic circuit without non-adiabatic energy loss Lim, Junho; Kwon, Kipaek; Chae, Soo-Ik Electronics Letters- IEE, 1998, vol. 34, pp.344-346.	DOI
1998	A cost-effective architecture for HDTV video decoder in ATSC receivers Kim, Jung-Min; Chae, Soo-Ik IEEE Trans. on Consumer Electronics, Vol. 44, No.4, pp.1353-1359	DOI
1998	New motion estimation algorithm using adaptively-quantized low bit resolution image and its VLSI architecture for MPEG2 video encoding Lee, Seongsoo; Kim, Jung-Min; Chae, Soo-Ik IEEE Trans. Circuits Syst. Video Technol., vol. 8, pp. 734-744	view file DOI
1998	Inceremental-search fast vector quantizer using triangular inequalities for multiple anchors Choi, Sunyoung; Chae, Soo-Ik Electronics Letters- IEE, 1998, 34, pp. 1192-1193
1998	Fast design of reduced complexity nearest-neighbor classifiers using triangular inequality Lee, Eelwan; Chae, Soo-Ik IEEE Trans. Pattern Anal. Mach. Intell., vol. 20, no. 5, pp. 562-566	view file DOI
1998-04	Reduction of bus transitions with partial bus-invert coding Shin, Young Soo; Chae, Soo-Ik; Choi, Kiyoung Electronics Letters- IEE, 1998, 34, (7), pp.642-643
1998-11	Simpler reversible energy recovery logic using NMOS switch networks with a cross-coupled PMOS pair Kwon, Kipaek; Chae, Soo-Ik Electronics Letters- IEE	view file DOI
1999	A 16-bit carry-lookahead adder using reversible energy recoverylogic for ultra-low-energy systems Lim, Junho; Kim, Donggyu; Chae, Soo-Ik IEEE J. Solid-State Circuits, vol. 34, pp. 898-903	DOI
1999	Hierarchical motion estimation in Hadamard transform domain Choi, Sunyoung; Chae, Soo-Ik Electronics Letters- IEE, 1999, 35, (25), pp. 2187-2188	DOI
1999	Reversible Energy Recovery logic circuits and its 8-phase clocked power generator for ultra-low-power applications Lim, Junho; Kim, Donggyu; Chae, Soo-Ik IEICE TRANSACTIONS on Electronics, Vol.E82-C, No.4, pp.646-653	view file
1999-12	Reduction in energy consumption by bootstrapped n MOS switches inreversible adiabatic CMOS circuits Lim, Junho; Kim, Donggyu; Chae, Soo-Ik IEE Proc., Circuits Devices Syst., 1999, 146, (6), pp. 327-333	DOI
2000	nMOS Reversible Energy Recovery Logic for Ultra-Low-Energy Applications Lim, Junho; Kim, Donggyu; Chae, Soo-Ik IEEE J. Solid-State Circuits, vol. 35, pp.865-875	view file DOI
2000	A 2 GHz CMOS Double Conversion Downconverter with Robust Image Rejection Performance against the Process and Temperature Variations Song, Eun-Seok; Chae, Soo-Ik; Kim, Wonchan VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on , vol., no., pp.38-41	view file DOI
2000-04	Extended mean-distance-ordered search using multiple l1and l2 inequalities for fast vector quantization Choi, Sunyoung; Chae, Soo-Ik IEEE Trans. Circuits Syst. II, vol. 47, pp. 349-352	view file DOI
2001	Partial Bus-Invert Coding for Power Optimization of Application-Specific Systems Shin, Young Soo; Choi, Kiyoung; Chae, Soo-Ik IEEE Trans. VLSI Syst., vol. 9, pp.377-383	view file DOI
2002-01	Two-step motion estimation algorithm for large search range usingoutlier pixel exclusion Lee, Seongsoo; Chae, Soo-Ik Electronics Letters- IEE, 2002, 38, (2), pp.68-69	DOI
2003	An efficient simulation environment and simulation techniques for Bluetooth device design Ahn, Yongjin; Kim, Dae Hong; Lee, Sunghyun; Park, Sanggyu; Yoo, Sung Joo; Choi, Kiyoung; Chae, Soo-Ik Design Automation for Embedded Systems, vol. 8, pp. 119-138	DOI
2004	A 2.4GHz 0.25um CMOS Dual-Mode Direct-Conversion Transceiver for Bluetooth and 802.11b Jung, Yeon-Jae; Jeong, Hoesam; Song, Eunseok; Lee, Jungho; Lee, Seung-Wook; Seo, Donghyeon; Song, Inho; Jung, Sanghun; Park, Joonbae; Jeong, Deog-Kyoon; Chae, Soo-Ik; Kim, Wonchan IEEE J. Solid-State Circuits, vol.39, pp.1185-1190	DOI
2004	A reset-free anti-harmonic delay-locked loop using a cycle period detector Song, Eun-Seok; Chae, Soo-Ik; Lee, Seung-Wook; Lee, Jeong-Woo; Park, Joonbae IEEE J. Solid-State Circuits, vol. 39, pp. 2055-2061	DOI
2004	A Cycle-accurate Energy Estimator for CMOS Digital Circuits Song, Eun-Seok; Park, Younggil; Kwon, Soon; Chae, Soo-Ik Lecture Notes in Computer Science, vol.3254, pp.159-168	DOI
2005	A 0.25um CMOS Quad-Band GSM RF Transceiver using an Efficient LO Frequency Plan Song, Eun-Seok; Lee, Deok-Hee; Chu, Sang Young; Chae, Soo-Ik; Koo, Yido; Jung, Yeon-Jae IEEE J. Solid-State Circuits, vol. 40, pp. 1094-1106	DOI
2007	Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC Han, Sang-Il; Brisolara, Lisane; Carro, Luigi; Reis, Ricardo; Guerin, Xavier; Jerraya, Ahmed Amine; Chae, Soo-Ik Design Automation for Embedded Systems 11(4):249-283	DOI
2007-12	Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC Han, Sang-Il; Chae, Soo-Ik; Brisolara, Lisane; Guerin, Xavier; Reis, Ricardo; Carro, Luigi; Jerraya, Ahmed Amine DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, Vol.11, No.4, pp.249-283	view file DOI
2008	A High-Performance OpenVG Accelerator with Dual-Scanline Filling Rendering Kim, Daewoong; Cha, Kilhyung; Chae, Soo-Ik IEEE Transactions on Consumer Electronics, vol. 54, pp.1303-1311	DOI
2008-05	A hardware operating system kernel for multi-processor systems Park, Sanggyu; Hong, Do-sun; Chae, Soo-Ik IEICE Electron. Express, 5(9), pp.296-302	DOI
2008-12	Cache Optimization for H.264/AVC Motion Compensation Yoon, Sangyong; Chae, Soo-Ik IEICE Trans. Information and Systems, vol. E91-D no. 12 pp.2902-2905	view file
2008-12	Cache Optimization for H.264/AVC Motion Compensation Yoon, Sangyong; Chae, Soo-Ik IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS; Vol.E91D, No.12, pp.2902-2905	view file DOI
2009	Simulink(R)-based heterogeneous multiprocessor SoC design flow for mixed Hardware/Software refinement and Simulation Han, Sang-Il; Chae, Soo-Ik; Brisolara, Lisane; Carro, Luigi; Popovici, Katalin; Guerin, Xavier; Jerraya, Ahmed A.; Huang, Kai; Li, Lei; Yan, Xiaolang Integration, the VLSI Journal 42 pp.227-245	DOI
2009	A mixed-level virtual prototyping environment for SystemC-based design methodology Park, Sanggyu; Yoon, Sangyong; Chae, Soo-Ik Microelectronics Journal. 40(7) 1082-1093.	DOI
2009-01	VLSI Implementation of a VC-1 Main Profile Decoder for HD Video Applications Cho, Jinhyun; Yoon, Sangyong; Park, Sanggyu; Lee, Doowon; Chae, Soo-Ik IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Vol.E92A, No.1, pp.279-290	view file DOI
2009-07	Adaptive Scanline Filling Algorithm for OpenVG 2D Vector Graphics Accelerator Kim, Daewoong; Cha, Kilhyung; Chae, Soo-Ik IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS; Vol.E92D, No.7, pp.1500-1502	view file DOI
2010-05	Constrained-Random Bitstream Generation for H.264/AVC Decoder Conformance Test Cho, Jinhyun; Choi, Soonwoo; Chae, Soo-Ik IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, Vol.56, No.2, pp.848-855	DOI